For example the ADX345 Accelerometer has a unique device address and addition internal registers addresses for the X, Y and Z axis. The internal registers are locations in the slave’s memory containing various information or data. Next is the internal registers addressing. The device addressing sequence stars with the most significant bit (MSB) first and ends with the least significant bit (LSB) and it’s actually composed of 7 bits because the 8 th bit is used for indicating whether the master will write to the slave (logic low) or read from it (logic high).
After this the clock starts and each data bit is transferred during each clock pulse. The start condition occurs when data line drops low while the clock line is still high. Let’s take even closer look at these events. Right after the addressing sequences follows the data sequences as many until the data is completely sent and it ends with a special stop condition. After the first Acknowledge bit in most cases comes another addressing sequence but this time for the internal registers of the slave device. After each 8 bits sequence follows a bit called Acknowledge. So after a special start condition occurs comes the first 8 bits sequence which indicates the address of the slave to which the data is being sent. The data signal is transferred in sequences of 8 bits.
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